Decoder circuits



Dec. 10, 1963 Original Filed Jan. 3l, 1957 H. KIHN ETAL DECODER CIRCUITS5 Sheets-Sheet l y MWL 3MTM Dec. 1o, 1963 H. IHN ETAL 3,114,047

DECODER CIRCUITS A Original Filed Jan. 3l, 1957 3 Sheets-Sheet 2 ifhmmag fnfm Dec. 1o, 1963 H. KIHN ET'AL 3,114,047

DECODER CIRCUITS Original Filed Jan. 31, 1957 3 Sheets-Sheet .3

er Mza/wi f mql www mel/nf United States Patent O 3,114,047 DECODERCIRCUTS Harry Kihn, Lawrenceviile, NJ., and WilliamE. Barnette,Levittown, Pa., assignors to Radio Corporation of America, a corporationof Delaware @riginal application lan. 3l, 1957, Ser. No. 637,532, n'owPatent No. 3,082,404, dated Mar. 19, w63. Divided and this applicationNov. 23, 1960, Ser. No. 71,203

4 Claims. (Cl. 307-88) functions in a desired manner or sequence. YOneapplica-iV tion of such a system is in the field of communications. Byarranging the decoder circuits to operate alarm or similar device, acalling system is provided by which the various subscribers to thesystem can be paged or alerted to perform some activity. Both mechanicaland electronic decoder circuits .areknown The mechanical circuits makeuse of a number of relay and other mechanical switching devices, whilethe electronic circuits make usev of a number of vacuum tubes andassociated equipment. The number of vacuum tubes used in the electroniccircuits requires the use of adequate power supplies and apparatus suchas blowers for dissipating the heat generated by the tubes.

Increasing attention in the design and construction of equipment used inthe field of electronics is being given to the conservation of space andto a reduction in the number of components. Size and weight are oftencritical factors to be considered in successfully building suchequipment. Because of the number and size of the components required, itis difcult, if not impossible, to design decoder circuits using themechanical and electronic decoder circuits now known which are smallenough in construction and sufficiently light in weight to be useful incertain applications. The necessity of providing large` power suppliesand other apparatus creates many problems in any attempt to reduce thesize or bulk and weight of the circuits. For example, it may bedesirable to include the decoder circuits in equipment which issuficiently small and light-weight in construction to be carried on theperson. Equipment of this type using either the mechanical or electroniccircuits now known would tend Ato be bulky and awkward to handle or slowin response requiring long signalling periods, thereby greatlydecreasing its value and possibility of use. A definite need exists inthe art for a decoder circuit which is small and capable of being madevery compact in construction. ln addition, it is highly desirable thatthe decoder circuit should be 'as dependable and as'fast or faster inoperation than the decoder circuits presently available.

An object of the invention is to obtain an improved decoder circuitwhich is smaller in construction and faster in operation than thedecoder circuits now known.

Another object of the invention is to provide a magnetic core-transistordecoder circuit adapted to perform a given function in response to apredetermined code signal, the decoder circuit so provided being bothsmaller in construction and faster in operation than the decodercircuits now known. I

Still another object of the invention is to obtain a ICC portable and4light-weight decoder circuit which can be carried on the person andrequires a low voltage power supply. s

In general, the decoder circuit according to the invention includesread-in, storage .and read-out circuits. The read-in circuit functionsto receive the signalelements of a code signal and to insert the signalelements into the storage circuit. The storage circuit functions tostore the signal elements as they are inserted therein by the operationof the read-in circuit and, in addition, functions to hold in storagethe signal elements of a code signal followingthe complete reception ofthe code signal by the read-in circuit such that an electrical conditioncorresponding to the 'code signal is established and maintained in thestorage circuit. The read-out circuit functions to check the 'nature ofthe electrical conditionestablished in the storage circuit and to causethe performance of some action, for example, the activation of an alarmdevice, if a predetermined electrical condition is determined to existin the storage circuit. If the electrical conditionestablished in thestorage circuit is different in nature from the predetermined electricalcondition, the decoder circuit may be arranged such that it performs nofurther action.

An improved magnetic core shift register is used in the presentinvention to perform the storage functions, and offersdeiiniteadvantages in its operational characteristics such as speed ofoperation, number and size of components required, and so on. Knowntypes of magnetic core shift registers usually involve the use of RC(resistance-capacitance) delay networks and biasing networks usingdiodes in the connections between the respective magnetic cores includedtherein. The diodes are high impedance elements and yalways dissipatepower. As a result, a high power drive or, in other words, acorrespondingly large power supply is required when relatively largenumbers of the elements are used in such known magnetic core shiftregisters.

In the operation of a magnetic core it is necessary to apply a magneticfield to the core for only a brief period of time in order to shift thecore from an unsaturated state to a saturated state, if the field whenapplied is sufciently'large to change the state of the core. 'It mightbe thought advisable to take advantage of low average power operation,requiring `a smaller power supply, by using apparatus in place of thediodes to produce rshort pulses of high peak current for shifting thestate of theL magnetic cores in a magnetic core shift register. However,the usual RC` delay network included in the connection between magneticcores in the known type magnetic core shift registers would distort thepeak to average ratio of the short pulses because of the integrationperformed thereby, removing they value of such apparatus used in placeof the conventional diodes. In constructing a decoder circuit accordingto the objects of the invention, considerable attention has been givento the space requirements of the storage circuit. If the magnetic coreshift registers now available were used, considerable difficulty wouldbe experienced due to the requirement of a large power supply and theoperational problems discussed.

It is, therefore, a further object of the invention to obtain animproved storage circuit suitable for use in a decoder circuit which isboth smaller in construction and faster in operation than the decodercircuits now available.

It is a still furtherobject of the invention toprovide a new `and noveltransistorized magnetic core shift register capable of low average poweroperation and suitable for use in a decoder circuit which is bothsmaller in construction and faster inoperation than the decoder circuitsnow available.

Briefly, the objects of the invention are accomplished by a decodercircuit including a transistor-magnetic core circuit arrangement. A codesignal including a series of positive `and negative |half sine wavepulses followed by a read-out or control pulse having a time durationapproximately equal to the time duration of the series of half sineywave pulses is applied from suitable receiving equipment to atransistor amplifier included in the read-in circuit of the decodercircuit. In addition to the transistor amplifier, tine read-in circuitincludes first and second transistor monocycle oscillator type triggergenerators which are hereinafter referred to as 1an information pulsegenerator and shift pulse generator, respectively. The information pulsegenerator functions in response to each half sine Wave pulse of lonepolarity applied thereto from the transistor amplifier yto feed aninformation pulse to a storage circuit including a transistorizedmagnetic core shift register constructed -according to the invention.Provision is made for causing the shift pulse generator to feed 1a shiftcurrent pulse to the magnetic core shi-ft regis- 'ter following eachoperation of the information pulse generator such that the informationstored in the register is advanced or shifted therethrough. The shiftpulse generator is arranged to function in response to each half sineWave pulse of the opposite polarity applied thereto from the transistoramplifier to feed -a shift current pulse to the magnetic core shiftregister, In this manner, an electrical condition corresponding to thearrangement of the half sine wave pulses included in an incoming codesignal -is established lan-d maintained in the magnetic core shiftregister forming a part of the storage circuit. Hal-f sine waves areused for illustration only since square, triangular, Gaussian or othertypes of pulses may be used.

Following the complete reception of the series of half sine Wave pulsesby the read-in circuit and the establishment of an electrical conditioncorresponding thereto in the magnetic core shift register of the storagecircuit, a third transistor monocycle oscillator type trigger generator,hereinafter referred to as the read-out pulse generator, is operated inresponse to the read-out pulse included in the'incoming code signal andapplied thereto from the transistor amplifier to apply current pulse tothe magnetic Core shift register. In addition to the read-out pulsegenerator, the read-out circuit of the decoder circuit includes atransistor multivibrator. The transistor multivibrator is responsive toan output signal produced by the operation of the magnetic core shiftregister upon the application of the current pulse from the read-outpulse generator to the mlagnetic core shift register. The transistormultivibrator operates in response to a given output signal which isproduced by the magnetic core shift register when a predeterminedelectrical condition has been established therein to perform someaction, for example, the operation of an alarm device. If an electricalcondition other than the predetermined electrical condition has beenestablished in the magnetic core shift register, an improper outputsignal is applied from the magnetic core shift register to thetransistor multivibrator. 'Ilhe transistor multivibrator isnon-responsive to the improper output signal and performs no furtheraction. Since the electrical condition established in the magnetic coreshift register of the storage circuit corresponds to the arrangement ofhalf sine wave pulses included in the incoming code signal, the decodercircuit isronly operated by the operation of the transistormultivibrator to perform a desired action such as the operation of analarm device in response to the reception by the decoder circuit of aproper and predetermined code signal. The decoder circuit is larrangedto perform no action in response to a code signal other than thepredetermined code signal.

A more detail description of the invention will :be given in connectionwith the accompanying drawing in which:

FIGURE l is a block diagram of one embodiment of the decoder circuitaccording to the invention;

FIGURE 2, FIGURES Za and 2b taken together, is a 4 circuit diagram givenby way of example and arranged in the manner of the block diagram shownin FIGURE 1 according to the invention;

FIGURE 3 is a chart used in explaining the operation of the magneticcore shift register shown in the circuit diagram of FIGURE 2; and,

FIGURE 4 is a diagram in section shown the manner in which the magneticcore-transistor circuit arranged according to the invention and used inthe magnetic core shift register shown in FIGURE 2 may be constructed asa single Referring to FIGURE l, an input signal, for example, in theIform of a carrier upon which is frequency modulated a predeterminednumber of serially appearing positive and negative half cycle sine wavepulses followed by a read-cut or control pulse is lapplied to an inputterminal 10. The read-out pulse is of a time duration approximatelyequal to that of the series of half sine wave pulses but may beconsiderably longer for increased safety or shorter for increasedspeed.y In describing the invention, it will be assumed that the signalapplied to the terminal lil originates at a transmitting station whichfunctions to transmit the signal over a radio channel using frequencymodulation. The signal is received by receiving equipment ofconventional design including the usual mixer yand intermediatefrequency stages and is applied from the receiving equipment to theterminal 10.

The invention is not to be considered as limited to the use thereof in afrequency modulation system. If a radio channel is used, the signal maybe sent by the transmitting station using yany of the known forms oftransmission. For example a carrier may be varied in phase or amplitudeby the imposition upon it of the signal, utilizing known transmitting`and receiving equipment. In certain applica-tions, the signal may beapplied directly to the decoder circuit of the invention over aconventional long line transmission system.

The frequency modulated carrier is `applied from the terminal 10 t0 adiscriminator 11. The discriminator 11 operates in a manner understoodin the ar-t to remove the incoming signal from the frequency modulatedcarrier wave by changing modulations in terms of frequency variationinto yamplitude variation. The signal is applied from the discriminator11 to Ian amplier 12. The amplifier 12 is biased to provide amplicationof both the positive and negative half since wave pulses. The signal isfed from the amplifier 12 to an information pulse generator 13, a shiftpulse generator 14 and a readout circuit 15. The information pulsegenerator 13 is only responsive to each half sine wave pulse of onepolarity to `apply a signal pulse to Ia signal register 16 over a lead17. As will be described, the signal register 16 includes atransistorized magnetic core shift register which functions as thestorage circuit of the decoder circuit according to the invention. Theshift register is of the type in which information can be stored bycausing the respective magnetic cores included therein to assume givenelectrical conditions, the information being advanced or shifted fromcoretocore through the shift register by the application of shiftcurrent pulses to the magnetic cores.

Following each operation of the information pulse generator 13 to applya signal pulse to the signal register 16, a control signal is appliedfrom the information pulse generator 13 to the shift pulse generator 14over a lead 18. The shift pulse generator .14 is responsive to thecontrol signal to apply a shift current'pulse to the magnetic cores inthe signal register 16 over a lead i9. The shift current pulse causesthe information stored in the magnetic cores of the signal register 16by t-he application of the signal pulses to the signal register 16 fromthe information pulse generator 13 to be shifted from core-to-corethrough the signal register 16.

While the information pulse generator 13 is responsive to the half sinewave pulses of one polarity included in s the incoming signal, it is notresponsive to the half sine wave pulses of the opposite polarity. Theshift pulse generator 1 4 is responsive to each of the half sine wavepulses of the opposite polarity to apply a shift current pulse to themagnetic cores in the signal register 16, causing the information storedin the magnetic cores of the signal register 16 to be shifted fromcore-to-core through the ysignal register 16.k In accordance with thecircuit operagenerator 14 is operated to `apply a furthershift current ypulse to the signal register 16. The signal pulses and shift pulses arevery narrow compared to the input half cycle sine wave pulses tosimplify delay circuitry and to conserve power. In this manner, themagnetic cores the signal register 16 are made to assume electricalconditions representative of the polarity ofthe half sine wave pulsesincluded in the incoming signal. Upon the complete reception of theseries of half sine wave pulses by the decoder circuit, an electricalcondition is established in the signal register 16 corresponding to thearrangement of half sine wave pulses in ythe incoming signal.

The read-out circuit 15 is responsive to the read-out pulse included inthe incoming signal following the series of half sine Wave pulses toapply ak current pulse to the signal register 16 over leadV 20. Themagnetic cores arranged to form the magnetic core shift registerincluded in the signal register 16 are interconnected in such a mannerthat an output signal according to the electrical condition establishedin the signal register 16 is produced Y upon the reception by the signalregister 16 of the intera rogation current pulse. The output signal isapplied from the signal regis-ter '16 to the read-out circuit 115 over alead Z1. The read-out circuit 15 is arranged to be responsive to a givenoutput signal produced by the signal register 16 when a predeterminedelectrical condition has been established in the signal register 16 toapply an operating signal to an alarm or control circuit Z2. The circuit22 may be designed to perform any desired function. For example, it maybe arranged to control the operation of other equipment in a desiredmanner as in telemetering, and so on. For purposes of description, itwill be assumed that the circuit 22 acts as an` alarm circuit to operatea lamp or sounding device. When an electrical proper output signal isapplied from the signal register 16 to the read-out circuit 15 a-nd theread-out circuit 15 performs no further action. Since the electricalcondition established in the signal register 16corresponds to theincoming signal, the decoder circuit of the invention is operated by theoperation of the read-out circuit 15 to energize the alarm circuit 22only when a predetermined signal has been received. If a signal otherthan the predetermined signal is received, the decoder circuit is ar'-ranged such that the alarm circuit 22 is not energized. A number ofdecoder circuits constructed accordingk to the invention can be readi-lyarranged in a communication system, each of the decoder circuits beingresponsive only` in thev circuit diagram, are shown and will bedescribed as P-N-P junction type transistors of N type conductivity.'ilhe transistors are of conventional design and each include acollector, emitter and base electrode. A transis-Y tor suitable for useis designated in the art as the 2N105 transistor. However, the inventionis not limited to the use of this particular type of transistor.Transistors of P .typey conductivity may be used in the circuit in placeof the transistors shown by changing the polarity of the voltage appliedto the `respective electrodes of the transistors in a manner understoodin the art. The information pulse generator 13 is a monocycle oscillatortype trigger generator and includes a transistor 31 anda magneticcore-32. The shift pulse generator r14 is also a monocycle oscillatortype trigger generator and includes a transistor 3.3 and a magnetic core34. A connection is provided between the information pulse generator 13and the shift pulse generator 14 including la magnetic core 35 forperforming a function to be described.

They storage circuit of the invetnion includes a signal register 16comprising av train of magnetic cores 36 through 51. The magnetic cores36 through 51 are arranged'in a magnetic core shift register of the typegenerally referred to in the ait as a single-core-per-bit shiftregister. A delay ymeans including a transistor circ-uit con-y structedaccording to the invention is provided between succeeding magnetic coresin the train.

The read-out circuit 15 of the invention includes` a monocycleoscillator type trigger generator23 defined as a read-out pulsegenerator comprising a transistor 52 and a magnetic core 53. In additionto the read-out 4pulse generator 23, the read-out circuit 15 includes atransistor multivibrator 54 having a single stable state of operation.

The multivibrator 54 includes. a first. transistor 55 which.

is normally conducting and a second transistor 56 which is normally,cut-olf. Upon the reception of an input pulse, transistor 56 becomesconducting and transistor 55 is cutoit'. Following a time intervaldetermined by the time constant of the circuit including capacitor 57and resistors 53, 59, the multivibrator 54 automatically returns to itssingle stable state in which transistor is conducting and transistor 56is cut-off. In other words, the receptiony of a single input pulsecauses the multivibrator 5-4Uto be triggered into an unstable state, themultivibrator 54 automatically returning to the single stable statethereafter. 'This type of multivibrator is generally referred to in theart as a monosta-ble multivibrator. An alarm circuit 22 is included inthe collector circuit of the transistor 56 and is arranged to beoperated during, the periods in which the multivibrator 54 is triggeredinto its unstable state.`

A connection including a magnetic core 77 is completed between thesignall register 16 and the multivibrator 54 for applying .an inpultpulse to the multivibrator 54 in a manner to be described. f l The sizeand weight ofthe decoder circuit of the invention is minimized by usingmagnetic cores toperform functions previously performed by otherelectrical equipment. The operation and construction of magnetic cores.

. perse is known in the art and, therefore, a detailed de- K tion ineither one of two directions.

to the code signal assigned thereto to perform a desired function.

Acircuit diagram of one embodiment of the invention is given by way ofexarmple in FIGURE 2. The read-in circuit of the invention includesari-amplifier stage 12, an information pulse generator 13 an-d a shiftpulse generator 14. 'Ihe amplifier stage 12 includes a transistor 30.The transistor .30, aswell as the other transistors included scriptionthereof is unnecessary. A magneticcoreris ay circuit element having asubstantially rectangular hysteresis loop of low coercive force. Certainmaterials such as molybdenum permalloy and manganese-magnesium fer riteexhibit a substantial rectangular hysteresis loop. A magnetic core iscapable of being magnetized to satura- In one direction, a positive oractive state is said to arise in which the direction of retentivity isopposite to that which would result from the application of a shift orsensing pulse to the magnetic core. Inf-the second direction, a negativeor inactive state is said to arise in which Vthe direction' ofretentivity is the same as that which would result from the applicationof a shift pulse? tothe magnetic core. A

7 inactive state is said to contain a zerof When a mag-V netic core isshifted from an active state to an inactive state, a voltage of onepolarity is induced in an output Winding on the core. A voltage of theopposite polarity is induced in the output Winding on the core when themagnetic core is shifted from an inactive to an active state. Thepolarity of the voltage in each case will depend upon the direction inwhich the output winding is Wound on the core. e

In the operation of the decoder circuit of the inven tion, a frequencymodulated carrier is applied from suitable receiving equipment to theinput terminal 10. The modulated carrier is applied from the terminal1i) to a discrirninator 11. The discriminator 11 functions to remove theincoming code signal from the frequency modulated carrier wave bychanging modulations in terms of frequency variation into amplitudevariation. An example of a code signal 60 appearing at the output of thediscriminator 11 is given in FIGURE 2. The code signal 60 includes aseries of positive and negative half sine wave pulses 61. While a seriesof fourteen such pulses 61 is shown, the number may be varied indifferent applications as will become apparent from the description. Thepositive and negative pulses are arranged in a given order so as to forma predetermined code signal. A read-out pulse 62 follows the series ofhalf sine wave pulses 61 and is of a duration approximately equal tothat of the series of pulses 61. The read-out pulse 62 is made ofsufiicient duration to permit the completion of the read-out functionsby the decoder circuit.

On the start-up of operation, an on-off switch 76 is closed. A negativevoltage is applied from the negative terminal of a source ofunidirectional potential shown as a 7.5 v. battery 63 to the collector64 of the transistor 30 over an electrical path including lead 65 andresistor 66. A filter capacitor 67 is connected across the battery 63. Anegative bias is developed across a voltage dividing network includingresistors 68, 69 and applied to the base 70 of the transistor 30. Theemitter 71 of the transistor 30 is connected to ground over anelectrical path including resistor 72. The term ground, as used in thespecification, is to be understood as referring to a point of fixedreference potential. The emitter 71 is positive with respect to the base70, while the collector 64 is negative with respect to the base 70. Thetransistor 3i) becomes and remains conducting.

The received code signal 60 is applied from the discrirninator 11 to thebase 70 of the transistor 30 over an electrical path including acapacitor 73 and a resistor '74. The resistor 74 functions to present ahigh impedance in the electrical path such that a high impedancediscriminator 11 may be used. The transistor 38 is biased to provideamplification of both the positive and negative signal pulses 61included in the code signal 60 with positive and negative saturationoccurring at about the same input level. The reception of each positivepulse causes the transistor 30 to approach cut-off such that a negativepulse is produced in the collector circuit thereof, while the receptionof each negative pulse causes the transistor 30 to conduct more heavilysuch that a positive pulse is produced in the collector circuit thereof.In this manner, the respective pulses included in the code signal 6G areeach amplified and reversed in polarity by the operation of thetransistor.

The code signal appearing in the collector circuit of the transistor 30is applied from the amplifier stagewlmZ to the read-out circuit 15. Thecode signal is also applied to the pulse generators 13, 14 over anelectrical pathincluding a coupling circuit comprising capacitor 80 andcapacitor 81 connected to ground. A unidirectional device shown as arectifier 82 is connected in series with the input to the informationpulse generator 13. For the sake of description, various otherunidirectional devices located elsewhere in the circuit diagram havealso been shown as rectifiers, for example, of the type designated inthe art by the reference 1Nl92. It is to be understood, however, thatother known devices designed to pass current in only one direction maybe used in place of the rectifiers shown. The rectifier 82 is poled inthe proper direction to pass only the positive half sine wave signalpulses included in the incoming code signal to the information pulsegenerator 13. The positive pulses are differentiated by the seriescapacitor 83 and the loW input resistance of the emitter fed transistor31. A differentiated positive pulse applied to the emitter 84 of thetransistor 31 causes the transistor 31 to conduct. A capacitor 85 isnormally charged negatively over an electrical circuit including thebattery 63, switch 76, lead 86, resistor 87, a turn winding 88 on themagnetic core 32, resistor S9, lead 90, and a rectifier 91. For the sakeof description, reference will be made to the number of turns in thevarious windings on the respective ferrite magnetic cores used in adecoder circuit which has been constructed according to the circuitdiagram given in FIGURE 2. The number of turns indicated in each case,however, is given only by way of example and may be changed to meetrequirements of a particular application.

When the transistor 31 becomes conducting, the capacitor 85 discharges.path including collector 93, lead 92, the 20 turn input winding 93 onthe first magnetic core 36 in the signal register 16, the winding 88 onthe magnetic core 32, capacitor 85, resistor 89, lead 9i) and emitter84. The magnetic core 32 is normally set in a one state. The voltageinduced in the winding 83 is in the proper polarity to start a shiftingof the magnetic core 32 from a one state into a zero state. A negativevoltage is induced in a 100 turn winding 95 on the magnetic core 32 andincluded in the base circuit of the transistor 31, driving the base 96of the transistor 31 negative. As a result of this regenerative action,the transistor 31 conducts e more heavily. The increased current flowscauses the magnetic core 32 to complete its shift into the zero state.Following the discharge of the capacitor and the shifting of themagnetic core 32 from a one into a zero state, the feedback to thetransistor 31 drops to zero because the coupling between the windings88, on the magnetic core 32 drops essentially to zero. The transistor 31ceases to conduct, and capacitor 85 again charges over the circuitoutlined above. The reversed current flow causes a voltage to be inducedin the winding 8S of the proper polarity to reset the magnetic core 32to the one state. The information pulse generator 13 is ready to operateupon the reception of the next positive signal pulse included in theincoming code signal.

A capacitor 97 is connected in parallel with the rectifier 91 shuntingthe emitter 84 input. The capacitor 97 charges negatively when theinformation pulse generator 13 is triggered. This negative charge biasesoff the emitter 84 immediately after the triggering of the transistor 31so that the transistor 31 can not be triggered again until the capacitor97 has discharged through the rectifier 91 to a sumciently low level.The value of the capacitor 97 is determined so as to prevent theretriggering of the transistor 31 by the same received positive pulse.At the same time, the value of the capacitor 97 is determined so thatthe capacitor 97 will be discharged by the time the next pulse includedin the incoming code signal is received, permitting the triggering ofthe transistor 31 if the next pulse is positive in nature. The parallelconnected rectifier 91 cuts the discharge time of the capacitor 97 to alow enough value to accommodate a desired code rate. It has been foundthat a code rate up to approximately 1500 cycles per second can beaccommodated. Since the rectifier 91 only conducts in the negativedirection, it does not load the positive signal pulses applied to theemitter 84.

The triggering of the information pulse generator 13 in the mannerdescribed produces a Very sharp pulse, for

Y example, of 3 microseconds duration, in the collector circuit of thetransistor 31. As pointed out above, input Current flows over anelectrical 9V winding 93 on the first magnetic core 36 in the signalregister 16 is connected in series with the winding 88 of the magneticcore 32. The application of the pulse to the input winding 93 causes avoltage of the proper polarity to be induced in the input winding 93such that the magnetic core 36 is shifted into a one state.

Reference was also made above tothe resistor 09 connected in series withthe winding 83 on themagnetic core 32. A capacitor 99 in series withaten turn winding 100 on the magnetic core 35 is connected in shunt withthe resistor 89. The capacitor 99 charges when the information pulsegenerator 13 triggers and discharges immediately afterward. During theperiod in which capacitor 99 charges, a Voltage of the proper polarityis induced in the winding 100 to cause the magnetic core 35 to shiftinto a one state, resulting in a negative voltage being induced in aforty turn winding 101 on the core 3S. When the capacitor 99 dischargesafter the triggering of the information pulse generator 13, a voltage ofthe opposite polarity is induced in winding 100, causing the magneticcore 35 to shift into a zero state. A positive voltage is induced in thewinding 101. The positive voltage results in the application of apositive pulse to the emitter 102 of transistor 33 included in the shiftpulse generator 14. The transistor 33 hecomesconducting. n

A capacitor 103 is normally charged over a path including battery 63,switch 76, lead 86, lead 104, resistor 105 and a fty turn winding 106 onthe magnetic core 34. A further capacitor 107 connected in parallel withcapacitor 103 is normally charged over the charging path of capacitor103, lead 100 and resistor 109. When transistor 33 conducts, capacitors103 and 107 discharge and current iiows over an electrical'pathincluding the collector 110, lead 111, the five turn shift, windings 115through 130 on the magnetic cores 36 through 51, respectively, in thesignal register 16, the winding 106 on the magnetic core 34, a groundreturn,.the Winding 101 on magnetic core 35 and emitter 102. Themagnetic core 34 is normally in a one state. The voltage induced in thewind? ing 106 causes the magnetic core 34 to start to shift into a zerostate. A negative voltage is induced in a one hundred turn winding 131,biasing the base 132 of transistor 33 negative. Transistor 33 conductsmore heavily.

The increased current flow resulting from this regenera tive actioncauses the magnetic core 34 to complete its shift into a zero state.When the magnetic coret34 becomes saturated, the coupling through thecore 34 dropping essentially to zero, the transistor 33 is cut-ofi.Capacitors 103 and 107 charge over the charging paths described. Avoltage of opposite polarity is induced in the winding 106, resettingthe magnetic core 34 in a one state. The shift pulse generator 14 isoperated in this manner to apply a very sharp positive pulse, forexample, of 3 Lmicroseconds duration, to the shift windings 115 through130 on the magnetic cores 36 through 51, respectively. The operation ofthe magnetic core 35 is such that the shift pulse will be applied to theshiftV windings 115 through 130 by the triggering of the shift pulsegenerator 14 approximately one pulse width or more after the applicationof the input pulse to the input winding 93 on magnetic core 36 by thetriggering of the information pulse generator 13.

A capacitor 133 in the base circuit of transistor 33 is chargedpositively during the triggering of the shift pulse generator 14 by thevoltage across the winding 131. After the shift pulse generator, 14 hastriggered, capacitor 133 discharges through a resistor 134 in shunttherewith. The base 132 is biased positive, preventing the accidentaltriggering of the shift pulse generator14. The value of the capacitor133 and resistor 134 is set so that the capacitor 133 will be dischargedby the time a next code signal pulse is received such that the shiftpulse generator 14 will be triggered in response to the signal pulse ifit is negative in nature. f

The shift pulse generator 14 includes a rectifier 135 connected inseries with its input. signal appearingk in the collector circuit oftransistor 30 is applied to the rectifier 135, as well as to therectifier S2 in the information pulse generator 13. The rectifier 135 ispoled in the proper direction to pass only the negative code signalpulses included in the incoming signal. The negative pulses aredifferentiated by a series capacitor 136 and the resistor 134 in shuntwith the'base input of the transistor 33. The application of thenegative voltage to the base 132 uponthe reception of each negativesignal pulse causes transistor 33 to conduct. The operation of the shiftkpulse generator 14 will be the same as described above. A very sharppulse is produced and applied tothe shift windings: 115 through 130 onthe magnetic cores 36 through 51, respectively, in they signal register16.

As the incoming code signal' is received, therefore, the informationpulse generator 13 is operated in response to each positivesignal pulseto apply an input pulse -to the winding 93 on the magnetic core 36 inthe signal register 16. Immediately after each operation of theinformation pulse generator 13, the shift p-ulse generator `14isautomatically operated by the operation of the magnetic core 35 to applya shift pulse to the shift windings 115 through 130 on the magneticcores 36 through 51, respectively, in the signal register 116. The shiftpulse generator 14 is The incoming code operated in response to eachnegative signal pulse includedy in the incoming code signal to applyalshift pulse to the windings 115 through 130. 'v

` The operation of the storage circuit including signal register 16 willnow be described. Various types of magnetic core shift registers areknown. Such shift registersinclude a number of magnetic cores arrangedin a train, each of the magnetic cores having at least an input, outputand shift winding mounted thereon. The output winding on each one of themagnetic cores is connected tothe input winding on the nextrnagneticcore in the train. The shift windings are usually connected 'in` seriesrelationship to a suitable source of shift current pulses. In theoperation ofthe shift register, the first f magnetic core inthe train ismade to assume a one state. Thereafter, a shift pulse is applied to theshift windings on all of the magnetic cores in the'train. This actioncauses the one to be read out of the first magnetic core and into thenext or second magnetic core in the train. That is to say, the firstmagneti'ccore shifts into a zero state, whilethe secondmagnetic core ismade to shift into a one state. A voltage induced in the output windingon the first magnetic core causes current to icw over the connectionbetween the first and the second magnetic core in the train. The voltageinduced in the input winding on the second magnetic core causes thesecond magnetic core to shift into a one state. It is essential that thevoltage lhe induced in the input winding on the second magnetic coreafter the shift pulse has been applied thereto. The simultaneousapplication of the shift pulse to the shift winding and of the inputpulse to the input winding on the second magnetic core would result in acancellation of the pulses, causing thesecond magnetic core to remain inits present state. Delay means are, therefore, provided in theconnection between the first and second magnetic ycores to delay theapplication of the inputV pulse to the second magnetic core until afterlthe shift pulse has been applied to the shift windings on al-l'themagnetic cores in the train. Similar delay means are provided betweeneach succeeding pair of magnetic cores in the train. As additional shiftpulses are applied to the shift windings on the magneticcores in thetrain, the one stored in the second core is made to advance coreby-corealong the train of magnetic cores. In this manner, information can befed into and stored in the shift register.

In one type of magnetic core shift register, a magnetic core is includedin the connection between succeeding magnetic cores in the train toperform the delay function referred to above. This type of shiftregister is generally referred to in the art as a tWo-core-per-bitVshift register. The use of the additional magnetic cores in a shiftregister, however, limits the speed of operation and involves the use ofadditional circuits and equipment, creating problems of power supply,and so on. Magnetic core shift registers are also available whichinvolve the use of RC (resistance-capacitance) delay networks andbiasing networks using diodes to perform the delay and advancefunctions. The disadvantages of the latter type of magnetic core shiftregisters have been previously mentioned. In Idesigning the decodercircuit of the invention, it was necessary to give attention to thenumber and size of components required in the construction and operationof the magnetic core shift or signal register 216 of the storagecircuit. A magnetic core shift register is disclosed by the inventionwhich is capable of low average power operation and offers definiteadvantages in its operational characteristics such as speed ofoperation, number and size of components required, and so on.

It will be assumed for the moment that a positive signal pulse includedin the incoming code signal appears in the collector circuit oftransistor 30. The rectifier 82 will pass the positive pulse, and theinformation pulse generator 13 is triggered in response thereto. A pulseis applied to the input win-ding 93 on the magnetic core 36. The currentin the input Winding 93 is of the proper polarity to cause the magneticcore 36 to shift into a one state. Immediately thereafter the shiftpulse generator 14 automatically functions to apply a shift pulse towinding 115. The magnetic core 36 starts to shift into a zero state. Anegative voltage is induced in a twenty turn winding 140, biasing thebase 141 of a transistor 142, negative. Transistor 142 becomesconducting, A capacitor 143 is normally charged over a path to bedescribed. When transistor `142 conducts, capacitor '143 discharges.Current iiows over an electrical path including emitter 144, collector145, a twenty turn winding 146 on the magnetic core 36, a twenty turninput winding 147 on the magnetic core 37, lead i148 and a one turnwinding 149 on -a magnetic core 150; The voltage induced in the win-ding146 causes an increase in the negative bias applied to .the base 141 bythe voltage induced in the winding 140. Transistor 142 is made toconduct more heavily. As a result of this regenerative action, themagnetic core 36 is shifted into the zero state. The current pulse inthe winding 147 during the period in `which capacitor 143 is dischargingis of a polarity to cause the magnetic core 37 to shift into a zerostate. yIf the magnetic core 37 is already in a zero state, no actionwill occur. If the magnetic core 37 is in a one state, the voltageinduced in the input winding 147 will assist the shift pulse applied tothe winding 2l116 in shifting the magnetic core 37 from a one into azero state.

When the magnetic core 36 is saturated in a negative direction or, inother words, a. zero is stored therein, the transistor 142 ceasesconducting sin-ce 4the base 141 is no longer biased negative. A largevalue capacitor 1155' in the read-out pulse generator 23 is normallycharged negatively over an electrical path Vincluding battery 63, switch76, lead 86, resistor '156 and a ten turn winding 157 on the magneticcore 53. When the transistor 142 ceases conducting, capacitor 143charges and capacitor i155 ydischarges an amount depending upon thenumber of other similar register stages also triggered at this time.Current flows over an electrical path including Winding 149 on themagnetic core 150, lead 148, capacitor `143, win-ding 147 on themagnetic core 37, resistor 158-, lead 159 and capacitor 155. The currentpulse applied to the winding 147 is in the proper polarity to cause themagnetic core 37 to shift from a zero state into a one state. In thismanner, there-fore, the one is read out of the magnetic core 36 and isread into the magnetic core 37, the ytransistor 142-capacitor 143circuit providing the necessary delay. If the next signal pulse includedin the incoming code signal should be negative in nature, the shiftpulse generator 14 will function to apply a shift pulse to the shiftwinding i116 ion the magnetic core 37. The one stored in the magneticcore 37 will be read out of the magnetic core 37 and will be read intothe magnetic core 38 following the circuit operations described, and

so on.

A clear understanding of the transistor 142-capacitor 143 circuit in theconnection between succeeding magnetic cores 36, 37 in the signalregister 16 may be had by an examination of the chart given in FIGURE 3in which current is plotted against time. The curve Il represents theperiod during which the transistor 142 is conducting, while curve I2represents the discharge time of the capacitor 143. When the transistor142 ceases conducting, the capacitor 143 charges to produce the curve I3which is in the proper direction to insert a one into the magnetic core37. While FIGURE 3 has been described in connection with the operationof the magnetic cores 36, 37, the operation of the remaining stages inthe signal register 16 will be exactly the same. A one stored in any ofthe magnetic cores 36 through 51 will be advanced core-by-core throughthe signal register 16 as shift current pulses are applied to the shiftwindings through 131) by the operation of the shift pulse generator 14.

It will now be assumed that a code signal corresponding to the codesignal 60 shown in FIGURE 2 is received by the decoder. circuit. Thesignal pulses 61 and the read-out pulse 62 are first amplified andreversed in polarity by the operation of the transistor circuit 30. Thefirst, second, fourth, seventh, eighth, ninth, tenth and twelfth signalpulses 61, as well as the read-out pulse 62, will appear as negativepulses in the collector circuit of the transistor 30, while the third,fifth, sixth, eleventh, thirteenth and fourteenth signal pulses 61 willappear as positive pulses. The information pulse generator 13 willfunction to insert a one into the magnetic core 36 in response to eachpositive signal pulse passed by the rectifier 82, the one inserted intothe magnetic core 36 being, thereafter, automatically advanced out ofthe magnetic core 36 and into the magnetic core 37 by the operation ofthe magnetic core 35 and the shift pulse generator 14. The shift pulsegenerator 14 will function in response to the negative signal pulsespassed by the rectifier to apply a shift current pulse to the shiftwindings 115 through 130. The operation of the signal register 16 inresponse to the operation of the information pulse generator 13 and tothat of the shift pulse generator 14 can be followed from the circuitoperations outlined above. Upon the reception of the fourteenth signalpulse 61, appearing as a positive pulse in the collector circuit of thetransistor 3i), a one will be stored in the magnetic cores 4S, 46, 45,4f), 3S and 37 corresponding to the third, fifth, sixth, eleventh,thirteenth and fourteenth positive signal pulses included in theincoming code signal and appearing in the collector circuit of thetransistor 30. The leading edge of the negative read-out pulse 62appearing in the collector circuit of the transistor 30 is passed by therectifier 135 and causes the shift pulse generator 14 to trigger. Theshift current pulse applied to the shift windings 115 through 130 causeseach one to be advanced into the next magnetic core in the signalregister 16. Therefore, following the complete reception of the incomingcode signal 60, a one is stored in the magnetic cores 49, 47, 46, 41, 39and 33, corresponding to the third, fifth, sixth, eleventh, thirteenthand fourteenth positive signal pulses appearing in the collector circuitof the transistor 30. A Zero is stored in the magnetic cores 51, 50, 48,45, 44, 43, 42 and 4f), corresponding to the first, second, fourth,seventh, eighth, ninth, tenth and twelfth negative signal pulsesappearing in the collector circuit of the transistor 30. A zero will be13 stored in the magnetic core 37 due to the receptionl of the negativeread-out pulse 62. Because of the automatic operation of the shift pulsegenerator 14, the magnetic core 36 has a zero stored therein. In thisconnection, it should be noted that with the exception of the briefperiod in which a one is'inserted in the magnetic core 36 by theoperation of the information pulse generator 13, the magnetic core 36.will remain in a zero state.

An electrical condition is, therefore, established and maintained in thesignal register 16 corresponding to the incoming code signal by thestorage action performed by the respective magnetic cores 36 through 51.While only one code signal 60 has been shown by way ofy example, theoperation of the signal register 16- will be similar to that describedin response to any other incoming code signal. In a decoder circuitdesigned to accommodate an incoming code signal including 14 signalpulses, as shown in FIGURE 2, the number of possible codes using thebinary number system is greater than 16,000 or 214. Code signalsincluding more than or less than 14 signal pulses cany be accommodatedby adding to or subtracting from the signal register 16 the desirednumber of magnetic core stages. As the number of signal pulses includedin the incoming code signal is increased, a correspondingly greaternumber of codes are, of course, possible. The arrangement used willdepend upon the requirements of the particular application.

As. the signal pulses appearing in the collector circuit of thetransistor 30 are applied to the'information pulse generator 13 and tothe shift pulse generator 14, they are also applied `to the read-outpulse generator` 23 in the read-out circuit 15 over a lead 160. VThesignal pulses are fed through an isolation capacitor 161, the amplitudeof the signal pulses being reduced by resistors 162, 163. The seriesyresistor 164 and a shunt capacitor 165 serve as the integrating circuitfor discriminating against the half sine wave signal pulses included inthe respective, circuits coupling succeeding magnetic cores in thesignal register 16 correspond to the resistor 15Sl in the circuit vcoupling magnetic cores 36, 37. The resistors 158, 166 through 180 areall connected in common to the lead 159. In describing the operation ofthe coupling circuit between the magnetic cores 36, 37, it was mentionedthat as the capacitor 143 charges through the resistor 158 tol insert aone in magnetic core 37, capacitor 155 discharges a small amount.Becausethe capacitor 55 is connected in common to all of the resistors158, 166 through 180 over lead 159, it it is clear that, as one or moreof the magnetic cores 37 through 51 are shifted into a one state as aresult of the application of a shift pulse to the shift windings 115through 129 during the read-in period, a similar change in theconditiony of the capacitor 155 occurs. The charge developed acrosscapacitor 155 becomes less negative each time a one is inserted into oneor more of the magnetic cores 37 through 51.

The fluctuations in the voltage developed across the capacitor i155 isused to performy two functions@ The magnetic core 53 is normally made toassume a .one state. When the voltage across the capacitor 155 becomesless negative due to the current flow resulting ffrom the firing of theregister core circuit, a currentflows in the winding 157 of the properpolarity to set and hold the magnetic core 53 in the one state.

At the same the battery 63.

, from ya one state into a zero state.

time a positive voltage is applied to the capacitor 165,

resulting in the base 181 of the transistor 52 being biased positivelyover an electrical path including a one hundred turn winding 182 on themagnetic core 53 and a lead 183. A small and constant positive voltageis applied to` the base 181 'from the positive terminal of a source of`unidirectional potential representedv by a 1.5 v. battery 184 over anelectrical path including resistor 185, winding 182 and lead 1183. As aresult of the positive bias supplied by the battery 184 and of theadditional positive bias sup- 11i plied` by the operation of thecapacitor 155, transistor 52 is eut-olf and is prevented from conductingin response to the signal pulses applied thereto from'the collectorcircuit of the transistor 30a At the same time, the magnetic core 53iskheld in a one state such that it can ynot be made to shift into azerostate. By this action, therefore, the sensitivity of the read-out pulsegenerator 23 is reduced during the read-in period of a cycle ofoperation such that the `read-out pulse generator'k 23 is not operatedin response to the signal pulses included in the incoming codef signal,or due to feed back pulses from the readout windings dur-ing codestorage in the register.

Following the reception of the series of signal pulses 61 and theestablishment of `an electrical condition corresponding thereto in thesignal register 16 in the manner described, the read-out pulse 62appears as a negative pulse in the collector circuit of the transistor3d. As described, the shift pulse generator 14 functions in response tothe negative pulse to yapplyI a shift pulse to the shift windingsthrough 130.' The negative pulse is also applied to the base 181 ofthe.transistor 52 in the read-out pulse generator 23. The negative pulse isof a width and amplitude such that the capacitor charges` throughresistor 164suiciently to cause the base 181 to be biased negatively.Transistor 52 conducts. Reference has already been made to the manner inwhich capacitors 103, 107 are normally charged negatively from Whentransistor 512 conducts, capacitors 103, 107 are discharged. Current owsover an electrical path including emitter 136, collector 137, a. fiftyturn winding 18-8 on the magnetic core 53, lead 189, the readoutwindings I19t) through 265 on the magnetic cores 36' through 51,respectively, `a two turn winding 266 on the magnetic core` 77, resistor169, capacitor 107 Iand the parallel connection including lead 1118 andcapacitor 103.

The current pulse in thewinding 183 is in the proper polarity to ycausethe magnetic core 53 tokstart shifting A negative voltage is induced inthe winding 182, causing the base 181 to Ibe. biased more negatively;Transistor 52 is made to conduct more heavily. The shifting of themagnetic core 53 from a one state into a zero state is completed.`

When the magnetic core 53 becomes saturated, the negative bias isremoved from the base 181. Capacitor 165' is at this time chargedpositively, causing transistor 52 to cease conducting and preventing theretriggering thereof. The read-out pulse generator 23 'functions in themanner described in response to the read-out pulse included in theincoming code signal to apply a read-out current pulse, for example, of3 micro-seconds duration, to the readout windings 199 through 205.

It will be remembered that capacitors 103, 107 lare discharged at thetime that the pulse generator 14tis triggered. Capacitors 103 and 167are also discharged at the time that the read-out pulse generator 23 istriggered.

It is clear, therefore, that the shift pulse generator 14 and` read-outpulse generator 233 are held off from being triggered during the sameperiod. By using capacitors 103', 107 in common, the shift pulsegenerator 14 is held off from being accidentally triggered during theread-out period of ioperation and the shift pulse generator 14 assistsin preventing the accidental triggering of the read-out pulse generator23 during the read-in period of operation.

Referring tothe signal register 16, the read-out windings 190 through205 arey not all mounted onk the magnetic cores 36 through 5'1,respectively, in the same direction. The windings 190, 191, 194, 4'196,197, i198, 199, 202, 204, andf20=5 are mounted on the magnetic cores 3637, 411,

42, 43, 44, 45, 48 5t) and 51, respectively, in a direction such thatthe applicationk of the current pulse from the read-out pulse generatorto these windings causes the `respective magnetic cores to beshiftedinto a zero state. On the other hand, the windings 192, 193195, 200;,2011 and 203 are mounted on lthe magnetic cores 38, 39, ,41, 46, 47 and49 in the reverse direction such that the application of the currentpulse thereto from the readout pulse generator 23 causes the respectivemagnetic cores to be shif-ted into a one state. It has previously beendescribed lhoW a code signal according to the code signal 60 shown inFIGURE 2 is received and an electrical condition corresponding theretoestablished in the signal register 16. A one is stored in the magneticcores 3S, 39, 41, 46, 47 and 49, a zero being stored in the remainingmagnetic cores in the signal register 16. As each of the magnetic cores36 through 51 is already in the state into which it would be otherwiseshifted by the current pulse, no shift in the state of any one of themagnetic cores 36 through 51 occurs in response to the current pulseapplied to the windings 19t) through 205 from the read-out pulsegenerator 23. The series-connected windings 19t)l through 205 representa low inductance such that a high current pulse flows over lead 189 andthrough the winding 206 on the magnetic core 77. The magnetic core 77 isnormally held in a one state. The current pulse applied to the winding206 is of the proper polarity and amplitude to cause the magnetic core77 to shift from a one state into a zero state. A positive voltage isinduced in a forty turn winding 207 on the magnetic core 77 and appliedto the emitter 20S of the transistor 56 in the nonostable multivibrator54. The Width of the B-H curve of core 77 is so adjusted as to enhancethe output of desired to undesired voltage.

The multivibrator 54 includes two transistors 56, 55. The emitter 209 ofthe transistor 55 is connected to the positive terminal of a source ofunidirectional potential represented by a 1.5 v. battery 210. A negativebiasing voltage is applied to the base 217 over an electrical pathincluding the battery 63, switch 76, lead 86 and resistor 59. Transistor55 is normally conducting and current flows over an electrical pathincluding emitter 209, collector 211, resistor 212, lead 86, switch 76and battery 63. The positive going voltage appearing in the collectorcircuit of transistor 55 is used to bias the base 220 of transistor 56positive over a lead 213 such that transistor 56 is normally cutoi. Thecapacitor 57 is normally charged negative with respect to the collector216 and positive with respect to the base 217. When the magnetic core 77is shifted into the zero state, the positive voltage applied to theemitter 208 causes the transistor 56 to start conducting. Current flowsover an electrical path including emitter 203, collector 216 and awinding 214. Capacitor 57 discharges, and a positive going voltage isapplied to the base 217. Transistor 55 becomes non-conducting. Thenegative going voltage appearing in the collector circuit of transistor55 and applied to the base 220 over lead 213 causes transistor 56 toconduct more heavily. Following a time period determined by the value ofthe capacitor 57 and resistors 58 and 59, the capacitor 57 discharges toa level such that the voltage applied to the base 217 is suiiicientlyless positive with respect to the voltage applied to the emitter 209from the battery 210 to cause the transistor 55 to conduct. The positivegoing voltage appearing in the collector circuit of the transistor 55and applied to the base 220 of the transistor 56 causes the transistor56 to cease conducting. The capacitor 57 re-charges in the polarityindicated above. As a result of this action, the monostable multibrator54 is reset in its single stable state in which transistor 55 isconducting and transistor 56 is cut-off. Resistor 58 and the shuntcapacity to ground of the base circuit of transistor 55 serve to preventsustained oscillations when the large inductance of winding 214 is inthe circuit.

During the period in which transistor 56 is conducting, the Winding 214included in the alarm device 22 is energized. The winding 214 may be,for example, an operate winding included in an electro-magneticallyoperated switching circuit. The switching circuit functions to operatesome type of alarm such as a light or soundi@ ing device, indicatingthat the code signal assigned to the decoder circuit has been received.

When a code signal including an arrangement of half sine wave pulsesdifferent than that included in the proper code signal 60 is receivedand an electrical condition corresponding thereto is established in thesignal register f 16, one or more of the magnetic cores 36 through 51will be set in a state opposite from that in which it is set upon thereception of the proper code signal. One or more of the magnetic cores38, 39, 41, 46, 47 and 49 may be set in a Zero state rather than in aone state and/or one or more of the magnetic cores 40, 42, 43, 44, 45,48, 50 and 51 may be set in a one state rather than in a zero state.Upon the application of the current pulse to the read-out windings 190through 205 by the operation of the read-out pulse generator 23 inresponse to the readout pulse included in the incoming code signal, eachof the magnetic cores in the wrong state will be shifted into theopposite state according to the direction of the readout winding mountedthereon. For example, if the first half sine wave pulse appearing at theoutput of the discriminator 11 should be negative rather than positive,a one will be stored in the magnetic core 51. The readout winding 205 ismounted on the magnetic core 51 in a direction to shift the magneticcore 51 into a zero state upon the application of the current pulse fromthe readout pulse generator 23 thereto. Because of this shift in thestate of certain of the magnetic cores 36 through 51, set in the wrongstate upon the reception of the incoming code signal, theseries-connected read-out windings 190 through 205 will present a highinductance. The amplitude of the current pulse in the winding 206 isreduced to a level such that it is insufficient to shift the state ofthe magnetic core 77. The multivibrator 54 is, therefore, not triggeredand the alarm device 22 remains inoperative. By the arrangementdescribed, therefore, the decoder circuit of the invention responds onlyto a predetermined code signal to activate the alarm device 22. When adifferent code signal is received and determined, no further actionoccurs.

The operation of the capacitor 143 and of the corresponding capacitors225 through 239 in the signal register 16 has been described. Thecapacitors 143, 225 through 239 are connected to a common ground returnover the electrical path including lead 148 and the winding 149 on themagnetic core 150. As the series of half sine wave pulses included in anincoming code signal is fed into the signal register 16 by the operationof the information pulse generator 13 and of the shift pulse generator14, different ones of the capacitors 143, 225 through 239 will lirstdischarge and then charge through the winding 149 in accordance with theorder in which the signal pulses of different polarity are fed to andadvanced through the signal register 16. Upon the application of a shiftpulse to the windings through 130, one or more of the capacitors 143,225 through 239 are discharged depending upon which of the magneticcores 36 through 51 have a one stored therein. The capacity dischargecurrent pulse in the winding 149 is of the proper polarity to shift themagnetic core 150 into a zero state. A negative voltage is induced in atwenty turn winding 240 connected to the base 241 of a transistor 242,causing the transistor 242 to conduct. A capacitor 243 is normallycharged over an electrical path including battery 63, switch 76, lead 86and resistor 248. When transistor 242 conducts, capacitor 243 dischargesand current ows over an electrical path including emitter 244, collector245, lead 246,'a twelve turn winding 247 on magnetic core 77 andcapacitor 243. The current pulse in winding 247 is in the properpolarity to set the magnetic core 77 in the one state. The particularones of the capacitors 143, 225 through 239 which have been discharged,charge through the winding 149 with a current of the proper polarity toshift the magnetic core 150 into the one state. Also a positive voltageis induced in the winding 240 to aid the cut-off of transistor t ln thismanner, the magnetic core b-transistor 242 circuit functions to set andto hold the magneticr core 77 in the one state, preventing theaccidental triggering of the multivibrator 54 during the read-in periodof operation.

The magnetic core lh-transistor 242 circuit performs still anotherfunction. Following the reception of some wrong code signals, one ormore of the magnetic cores 3d through 5l may be Vshifted from a onestate into a zero state upon the application of the current pulse fromthe read-out pulse generator 23 to the windings 19t? through 2.65. ifthe magnetic core succeeding a magnetic core in the signal register 16which has been shifted into the Zero state is in the one state, thesucceeding magnetic core may also be shifted from the one into the zerostate by the internal operation of the signal register 15. Theinductance change brought about by the shifting of the rst magnetic coremay be cancelled out by the inductance change brought about by theshifting of the succeeding magnetic core. This action may make anincorrect signal code appear correct. if any of the magnetic cores 376through 5l are shifted from a one into a zero state upon theapplicationof the current pulse from the read-out pulse generator 23 tothe windings 9@ through 265, the corresponding ones of the capacitorsE43, 225 through 239 'are discharged through the Winding M9. Thermagnetic core ld is shifted into the zero state, and transistor 242becomes conducting. The current pulse in the Winding 247 holds themagnetic core 77 in the one state, preventing a shift in the state ofthe magnetic core '77 in response to the current pulse applied to theWinding Ebd. The read-out circuit l5 is in this manner arranged tooperate the alarm device 22 only when an electrical conditioncorresponding to a predetermined or assigned code signal is establishedin the signal register ld.

While a specific application of the invention is given in FlGURE 2, itis clear that various modifications may be made without departing fromthe spirit thereof. The read-out circuit 1S has been described asresponsive to a negative read-out pulse. By making minor changesunderstood in the art, the read-out circuits included in certain decodercircuits may be made responsive instead to a positive read-out pulse.This action would effectively double the number of codes that could behandled in a system including a plurality of the decoder circuits of theinvention. Further, if the information stored in the signal register l5is shifted before the signal pulse is applied thereto from theinformation pulse generator i3 rather than after as described above, anadditional core stage in the signal register l will become available toincrease the storage capacity of the signal register lo. The number ofcodes that can be handled by a single decoder circuit Will beeffectively doubled, thereby doubling the number of codes possible in asystem including a number of the decoder circuits.

One Way in which the magnetic core-transistor circuit used in the signalregister i6 of the invention may be constructed is shown in FIGURE 4.Each magnetic core-transistor circuit is constructed as a single unit259, a number of the units 25@ being connected together to form thesignal register ld. For the sake of description, the unit 250 shown inFIGURE 4 is assumed to be the second unit of the signal register i6. Thetransistor 255, magnetic core 37', resistor 166 and capacitor 143 arearranged in the manner shown and supported in a body of non-conductingmaterial 249 such as plastic. The unit may be constructed as a plug-inunit or may be provided with soldering connections as shown. The mannerin which the connections are made to the unit 25) can be readilydetermined by an examination of FIGURE 2. The unit is both small in sizeand light in Weight, making it particularly suitable for use in circuitssuch as the decoder circuit of the invention, as well as in otherapplications. LThe unit 250 is suitable for use in any application whereit is desirable to use a magnetic. core circuit capablek of low averagepower operation. Maintenance problems are greatly reduced by using theunit 25h since ther unit 256* can be easily replaced, and so on.

A decoder circuit is disclosed by the invention otering certain definiteadvantages over similar circuits previously known. in the manner taughtby the invention to perform the necessary functions in place of vacuumtubes and other apparatus, a decoder circuit requiring a small powersupply is obtained which is small in size, light in Weight and capableof highspeeds of operation. In one application, the various doctors,nurses and others who might be called in a hospital may be provided withindividual portable light-Weight radio receivers each including theVdecoder circuit of the invention and designed to be carried on theperson. The receivers would be provided with selective calling deviceseach arranged to respond to a different code signal. The radiotransmitter may be located at a telephone switchboard and provided Withmeans, for example, a dialing system, to transmit thc different codesignals.

What is claimed is:

l. A switching device comprising a magnetic core capable of assumingeither one of two stable states, means including a iirst Winding on saidcore for placing said core in one of said states, a regenerativecircuity including a current conducting device coupled to said core tobring about a shift in the state of said core from said one state toVthe other one of said states when said device is made to conduct, aresistor coupled between said circuit and a source of unidirectionalpotential, a series circuit including a storage devicey and an outputload element, vmeans to connect one end of said series circuit tothejunction of said resistor and said regenerative circuit and the otherend of said series circuit to a point of reference potential, saidstorage device being normally charged from said source through saidresistor withk current iioW 'in one direction through said load element,and means including a second winding on said core for operating saidcore when in said one state to cause said current conducting device toconduct and to discharge said storage device in the opposite directionthrough said load element, said current conducting device ceasingconduction upon said core assuming said other state to cause saidstorage device to thereafter charge from said source in said onedirection through said load element and said resistor.

2. In combination, a magnetic device capable of assuming .either one oftwo stable states and having .'iirst, second, third and fourth windingsthereon, means coupled to said first winding for placing said device inone of said statesa transistor having base, emitter and collectorelectrodes, a resistor, means to connect said collector electrodethrough said second Winding and said resistor in series to a source ofunidirectional potential, means to connect said emitter electrode to apoint of reference potential, means to connect said base electrodethrough said third winding to said point of reference potential, aseries circuit including a capacitor and an output load element means toconnect one end of said series circuit to the junction of said resistorand said econd Winding and the otherend of said series circuit to saidpoint of reference potential, said capacitor being normally charged inone direction through said element and through said resistor from saidsource, means connected to said fourth winding to operate said devicewhen in said one state to cause said transistor to conduct by thedischarge of said capacitor through said element in the oppositedirection, said transistor conducting only until said device assumessaid other state By using magnetic cores and transistors` 19 tpermitting said capacitor to thereafter recharge from said source. Y

3. A switching device comprising a magnetic core capable of assumingeither one of two stable states, means including a first winding on saidcore for placing said core in one of said states, a transistor having atleast an input, an output and a common electrode, means connecting saidcommon electrode to a point of reference potential, a second and thirdwinding on said core, a resistor, means to connect said output electrodethrough said second winding and said resistor in series to a source ofunidirectional potential, means to connect said input electrode throughsaid third winding to said point of reference potential, a seriescircuit including a capacitor and an output load device, means toconnect one end of said series circuit to the junction of said resistorand said second Winding and the other end of said series circuit to saidpoint of reference potential to cause said capacitor to be normallycharged from said source with current flow through said resistor and inone direction through said load device, a fourth winding on said core,means connected to said fourth winding to shift said core when in saidone state to its second state by causing said transistor to conduct soas to discharge said capacitor with current flow through said loaddevice in the opposite direction, said transistor ceasing conductionupon said core assuming said second state to cause said capacitor tothereafter charge from said source with current flow through saidresistor and said load device in said one direction.

4. A switching device comprising a magnetic core capable of assumingeither one of two stable states, means including a first winding on saidcore for placing said core in one of said states, a transistor having atleast an input, an output and a common electrode, means to connect saidcommon electrode to a point of reference potential, a second and thirdwinding on said core,

a resistor, means to connect said output electrode through said secondwinding and said resistor in series to a source of unidirectionalpotential, means to connect said input'electrode through said thirdwinding to said point of reference potential, a second magnetic corecapable of assuming either one of two stable states and having a fourthwinding thereon, a capacitor, means to connect one side of saidcapacitor through said fourth winding to the junction of said resistorand said second winding and to connect the other side of said capacitorto said point of reference potential, said capacitor being normallycharged from said source through said fourth winding and said resistor,a fth winding on said rst core, means connected to said fth winding toshift said iirst core when in said one stable state to its second stablestate by causing said transistor to conduct, said capacitor beingdischarged upon the conduction of said transistor with current flowthrough said fourth winding in a direction producing a current pulse insaid fourth winding of a polarity to cause said second core to be placedin one of its stable states, said transistor ceasing conduction uponsaid rst core assuming its second stable state to allow said capacitorto thereafter charge from said source by current through said fourthwinding in the opposite direction producing a current pulse in saidfourth winding of a polarity to place said second core in the secondstable state thereof.

IRE Publication: IRE Convention Record, Part 4, pages 84-94, March2l-24, 1955.

Navy Publication: Basic Electronics (Navy Training Courses), Navpers10087, 1955, pages 149-150.

2. IN COMBINATION, A MAGNETIC DEVICE CAPABLE OF ASSUMING EITHER ONE OFTWO STABLE STATES AND HAVING FIRST, SECOND, THIRD AND FOURTH WINDINGSTHEREON, MEANS COUPLED TO SAID FIRST WINDING FOR PLACING SAID DEVICE INONE OF SAID STATES, A TRANSISTOR HAVING BASE, EMITTER AND COLLECTORELECTRODES, A RESISTOR, MEANS TO CONNECT SAID COLLECTOR ELECTRODETHROUGH SAID SECOND WINDING AND SAID RESISTOR IN SERIES TO A SOURCE OFUNIDIRECTIONAL POTENTIAL, MEANS TO CONNECT SAID EMITTER ELECTRODE TO APOINT OF REFERENCE POTENTIAL, MEANS TO CONNECT SAID BASE ELECTRODETHROUGH SAID THIRD WINDING TO SAID POINT OF REFERENCE POTENTIAL, ASERIES CIRCUIT INCLUDING A CAPACITOR AND AN OUTPUT LOAD ELEMENT MEANS TOCONNECT ONE END OF SAID SERIES CIRCUIT TO THE JUNCTION OF SAID RESISTORAND SAID SECOND WINDING AND THE OTHER END OF SAID SERIES CIRCUIT TO SAIDPOINT OF REFERENCE POTENTIAL, SAID CAPACITOR BEING NORMALLY CHARGED INONE DIRECTION THROUGH SAID ELEMENT AND THROUGH SAID RESISTOR FROM SAIDSOURCE, MEANS CONNECTED TO SAID FOURTH WINDING TO OPERATE SAID DEVICEWHEN IN SAID ONE STATE TO CAUSE SAID TRANSISTOR TO CONDUCT BY THEDISCHARGE OF SAID CAPACITOR THROUGH SAID ELEMENT IN THE OPPOSITEDIRECTION, SAID TRANSISTOR CONDUCTING ONLY UNTIL SAID DEVICE ASSUMESSAID OTHER STATE PERMITTING SAID CAPACITOR TO THEREAFTER RECHARGE FROMSAID SOURCE.